clj-ebpf.dsl.atomic — org.clojars.pgdad/clj-ebpf 0.1.0

Atomic memory operations for BPF programs.

Provides thread-safe operations for concurrent access to shared memory, essential for implementing lock-free counters, statistics, and data structures.

Available operations:

• atomic-add : *dst += src
• atomic-or : *dst |= src
• atomic-and : *dst &= src
• atomic-xor : *dst ^= src
• atomic-xchg : src = xchg(*dst, src)
• atomic-cmpxchg: r0 = cmpxchg(*dst, r0, src)

Fetch variants return the original value:

• atomic-fetch-add, atomic-fetch-or, atomic-fetch-and, atomic-fetch-xor

All operations support 32-bit (:w) and 64-bit (:dw) sizes.

Example:

;; Increment counter atomically
(atomic-add :dw :r1 :r2 0)  ; *r1 += r2

;; Fetch and add (returns old value in src register)
(atomic-fetch-add :dw :r1 :r2 0)  ; r2 = fetch_add(*r1, r2)

atomic-add clj

(atomic-add size dst src)

(atomic-add size dst src offset)

Atomic add: *dst += src

Atomically adds src to the memory location pointed to by dst+offset.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register containing value to add
• offset: Memory offset (default 0)

Example:

;; counter += 1 where counter is at address in r1
(mov :r2 1)
(atomic-add :dw :r1 :r2 0)

atomic-and clj

(atomic-and size dst src)

(atomic-and size dst src offset)

Atomic AND: *dst &= src

Atomically ANDs src with the memory location pointed to by dst+offset.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register containing value to AND
• offset: Memory offset (default 0)

atomic-available? clj

(atomic-available? op kernel-version)

Check if an atomic operation is available for a kernel version.

Arguments:

• op: Operation keyword (:atomic-add, :atomic-xchg, etc.)
• kernel-version: Kernel version string (e.g. "5.15")

Returns true if the operation is supported.

atomic-clear-bit clj

(atomic-clear-bit size ptr-reg tmp-reg bit-num)

(atomic-clear-bit size ptr-reg tmp-reg bit-num offset)

Generate instructions to atomically clear a bit.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• ptr-reg: Register containing pointer to value
• tmp-reg: Temporary register (will hold inverted bit mask)
• bit-num: Bit number to clear (0-31 for :w, 0-63 for :dw)
• offset: Memory offset (default 0)

Returns a vector of instructions.

atomic-cmpxchg clj

(atomic-cmpxchg size dst src)

(atomic-cmpxchg size dst src offset)

Atomic compare and exchange: r0 = cmpxchg(*dst, r0, src)

If *dst equals r0, atomically replace *dst with src. Always returns the original value of *dst in r0.

This is the fundamental building block for lock-free algorithms.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register containing new value (if compare succeeds)
• offset: Memory offset (default 0)

Note: r0 contains the expected value and receives the original value.

Example:

;; Try to set *r1 to 1 if it's currently 0
(mov :r0 0)           ; Expected value
(mov :r2 1)           ; New value
(atomic-cmpxchg :dw :r1 :r2 0)
;; r0 now contains original *r1, *r1 is 1 if it was 0

atomic-dec clj

(atomic-dec size ptr-reg tmp-reg)

(atomic-dec size ptr-reg tmp-reg offset)

Generate instructions to atomically decrement a counter by 1.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• ptr-reg: Register containing pointer to counter
• tmp-reg: Temporary register (will be set to -1)
• offset: Memory offset (default 0)

Returns a vector of instructions.

atomic-fetch-add clj

(atomic-fetch-add size dst src)

(atomic-fetch-add size dst src offset)

Atomic fetch and add: src = fetch_add(*dst, src)

Atomically adds src to *dst and returns the original value in src.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register with value to add, receives original value
• offset: Memory offset (default 0)

Example:

;; Increment counter and get previous value
(mov :r2 1)
(atomic-fetch-add :dw :r1 :r2 0)
;; r2 now contains the value before increment

atomic-fetch-and clj

(atomic-fetch-and size dst src)

(atomic-fetch-and size dst src offset)

Atomic fetch and AND: src = fetch_and(*dst, src)

Atomically ANDs src with *dst and returns the original value in src.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register with value to AND, receives original value
• offset: Memory offset (default 0)

atomic-fetch-or clj

(atomic-fetch-or size dst src)

(atomic-fetch-or size dst src offset)

Atomic fetch and OR: src = fetch_or(*dst, src)

Atomically ORs src with *dst and returns the original value in src.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register with value to OR, receives original value
• offset: Memory offset (default 0)

atomic-fetch-xor clj

(atomic-fetch-xor size dst src)

(atomic-fetch-xor size dst src offset)

Atomic fetch and XOR: src = fetch_xor(*dst, src)

Atomically XORs src with *dst and returns the original value in src.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register with value to XOR, receives original value
• offset: Memory offset (default 0)

atomic-inc clj

(atomic-inc size ptr-reg tmp-reg)

(atomic-inc size ptr-reg tmp-reg offset)

Generate instructions to atomically increment a counter by 1.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• ptr-reg: Register containing pointer to counter
• tmp-reg: Temporary register (will be set to 1)
• offset: Memory offset (default 0)

Returns a vector of instructions.

atomic-or clj

(atomic-or size dst src)

(atomic-or size dst src offset)

Atomic OR: *dst |= src

Atomically ORs src with the memory location pointed to by dst+offset.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register containing value to OR
• offset: Memory offset (default 0)

atomic-set-bit clj

(atomic-set-bit size ptr-reg tmp-reg bit-num)

(atomic-set-bit size ptr-reg tmp-reg bit-num offset)

Generate instructions to atomically set a bit.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• ptr-reg: Register containing pointer to value
• tmp-reg: Temporary register (will hold bit mask)
• bit-num: Bit number to set (0-31 for :w, 0-63 for :dw)
• offset: Memory offset (default 0)

Returns a vector of instructions.

atomic-support clj

Kernel version requirements for atomic operations.

All basic atomics (add, or, and, xor) require kernel 4.20+. Exchange and compare-exchange require kernel 5.12+. Fetch variants require kernel 5.12+.

atomic-toggle-bit clj

(atomic-toggle-bit size ptr-reg tmp-reg bit-num)

(atomic-toggle-bit size ptr-reg tmp-reg bit-num offset)

Generate instructions to atomically toggle a bit.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• ptr-reg: Register containing pointer to value
• tmp-reg: Temporary register (will hold bit mask)
• bit-num: Bit number to toggle (0-31 for :w, 0-63 for :dw)
• offset: Memory offset (default 0)

Returns a vector of instructions.

atomic-xchg clj

(atomic-xchg size dst src)

(atomic-xchg size dst src offset)

Atomic exchange: src = xchg(*dst, src)

Atomically swaps the value at memory location dst+offset with src. The original memory value is placed in src.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register containing new value, receives old value
• offset: Memory offset (default 0)

Example:

;; Swap values: r2 = *r1, *r1 = r2
(atomic-xchg :dw :r1 :r2 0)

atomic-xor clj

(atomic-xor size dst src)

(atomic-xor size dst src offset)

Atomic XOR: *dst ^= src

Atomically XORs src with the memory location pointed to by dst+offset.

Arguments:

• size: :w (32-bit) or :dw (64-bit)
• dst: Register containing memory address
• src: Register containing value to XOR
• offset: Memory offset (default 0)