Hardware-specific optimization and topology management for quantum circuits.
This namespace provides functionality for optimizing quantum circuits for specific hardware topologies, including qubit routing, SWAP insertion, and topology-aware optimization strategies.
Hardware-specific optimization and topology management for quantum circuits. This namespace provides functionality for optimizing quantum circuits for specific hardware topologies, including qubit routing, SWAP insertion, and topology-aware optimization strategies.
(optimize circuit supported-operations & [coupling options])Optimization pipeline that handles gate decomposition properly.
The order is:
Parameters:
Returns: Complete optimization result with corrected pipeline
Optimization pipeline that handles gate decomposition properly. The order is: 1. Gate cancellation optimization (remove redundant gates) 2. Qubit optimization (minimize qubits before topology constraints) 3. Topology optimization (with decomposition-aware routing) 4. Final gate decomposition (handle any remaining virtual gates) 5. Validation and cleanup Parameters: - circuit: Quantum circuit to optimize - supported-operations: Set of natively supported operations - coupling: Qubit coupling for hardware topology (optional) - options: Optimization options - :optimize-gates? (default true) - Enable gate cancellation optimization - :optimize-qubits? (default true) - Enable qubit usage optimization - :optimize-topology? (default false) - Enable topology-aware optimization - :transform-operations? (default true) - Enable final gate decomposition - Additional options passed to sub-functions Returns: Complete optimization result with corrected pipeline
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