Hardware-specific optimization and topology management for quantum circuits.
This namespace provides the full optimization pipeline that integrates gate cancellation, qubit optimization, topology-aware transformation with decomposition-aware routing, and final gate decomposition to ensure that quantum circuits are optimized for execution on specific hardware topologies.
Hardware-specific optimization and topology management for quantum circuits. This namespace provides the full optimization pipeline that integrates gate cancellation, qubit optimization, topology-aware transformation with decomposition-aware routing, and final gate decomposition to ensure that quantum circuits are optimized for execution on specific hardware topologies.
(optimization-statistics original-circuit optimized-circuit)Analyze original and optimized circuits and provide comprehensive report of the optimizations.
Parameters:
Returns: Map containing analysis data including qubit/gate counts, circuit depth, and operation type differences.
Analyze original and optimized circuits and provide comprehensive report of the optimizations. Parameters: - original-circuit: The circuit before optimization - optimized-circuit: The circuit after optimization Returns: Map containing analysis data including qubit/gate counts, circuit depth, and operation type differences.
(optimize ctx)(optimize circuit device)(optimize circuit device options)Optimization pipeline that handles gate decomposition properly.
The order is:
Parameters:
Returns: Complete optimization result with corrected pipeline
Optimization pipeline that handles gate decomposition properly. The order is: 1. Gate cancellation optimization (remove redundant gates) 2. Qubit optimization (minimize qubits before topology constraints) 3. Topology optimization (with decomposition-aware routing) 4. Final gate decomposition (handle any remaining virtual gates) 5. Validation and cleanup Parameters: - circuit: Quantum circuit to optimize - supported-operations: Set of natively supported operations - coupling: Qubit coupling for hardware topology (optional) - options: optional Optimization options (defaults shown) - :optimize-gates? (default true) - Enable gate cancellation optimization - :optimize-qubits? (default true) - Enable qubit usage optimization - :optimize-topology? (default true) - Enable topology-aware optimization - :transform-operations? (default true) - Enable final gate decomposition - Additional options passed to sub-functions Returns: Complete optimization result with corrected pipeline
(validate-result-context ctx)Validate the optimization result context to ensure all gates are supported.
Parameters:
Returns: Updated context with:
Validate the optimization result context to ensure all gates are supported.
Parameters:
- ctx: Optimization context containing:
:circuit - The optimized circuit
:supported-operations - Set of natively supported operations
Returns:
Updated context with:
- :all-gates-supported? - Boolean indicating if all gates are supported
- :final-unsupported-gates - List of unsupported gate types (if any)cljdoc builds & hosts documentation for Clojure/Script libraries
| Ctrl+k | Jump to recent docs |
| ← | Move to previous article |
| → | Move to next article |
| Ctrl+/ | Jump to the search field |