rt.verilog.grammar — xyz.zcaudate/rt.verilog 4.1.1

!.verilog clj macro

(!.verilog & body)

+book+ clj

+features+ clj

+grammar+ clj

+init+ clj

+meta+ clj

+template+ clj

always.verilog clj macro

(always.verilog & body)

assign.verilog clj macro

(assign.verilog & body)

break clj macro

def$.verilog clj macro

(def$.verilog & body)

def.verilog clj macro

(def.verilog & body)

defabstract.verilog clj macro

(defabstract.verilog & body)

defgen.verilog clj macro

(defgen.verilog & body)

defglobal.verilog clj macro

(defglobal.verilog & body)

defmacro.verilog clj macro

(defmacro.verilog & body)

defn-.verilog clj macro

(defn-.verilog & body)

defn.verilog clj macro

(defn.verilog & body)

defptr.verilog clj macro

(defptr.verilog & body)

defrun.verilog clj macro

(defrun.verilog & body)

deftemp.verilog clj macro

(deftemp.verilog & body)

initial.verilog clj macro

(initial.verilog & body)

reg.verilog clj macro

(reg.verilog & body)

return clj macro

tf-always clj

(tf-always [_ trigger & body])

transforms always block

tf-assign clj

(tf-assign [_ left right])

transforms assign

tf-blocking clj

(tf-blocking [_ left right])

transforms blocking assignment =

tf-concatenation clj

(tf-concatenation [_ & args])

transforms concatenation {a, b}

tf-delay clj

(tf-delay [_ val])

transforms delay #10

tf-initial clj

(tf-initial [_ & body])

transforms initial block

tf-module clj

(tf-module [_ sym args & body])

transforms module definition

tf-non-blocking clj

(tf-non-blocking [_ left right])

transforms non-blocking assignment <=

tf-reg clj

(tf-reg [_ & args])

transforms reg declaration

tf-wire clj

(tf-wire [_ & args])

transforms wire declaration

wire.verilog clj macro

(wire.verilog & body)